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Strany 1 - Endpoint v2.4

LogiCORETM IP Ethernet AVB Endpoint v2.4 User GuideUG492 July 23, 2010

Strany 2 - Revision History

10 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 9: Precise Timing Protocol Packet BuffersFigure 9-1: Tx PTP Packet Buff

Strany 3 - Table of Contents

100 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusTri-Mode Ethernet MAC Address SpaceWhen the

Strany 4 - Chapter 5: Core Architecture

Ethernet AVB Endpoint User Guide www.xilinx.com 101UG492 July 23, 2010PLB Address Map and Register DefinitionsMAC MDIO RegistersThe Tri-Mode Ethernet

Strany 5

102 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and Status

Strany 6

Ethernet AVB Endpoint User Guide www.xilinx.com 103UG492 July 23, 2010Chapter 11Constraining the Core This chapter defines the Ethernet AVB Endpoint c

Strany 7

104 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 11: Constraining the CorePERIOD Constraints for Clock NetsPLB_clkThe clo

Strany 8

Ethernet AVB Endpoint User Guide www.xilinx.com 105UG492 July 23, 2010Required Constraintsrtc_clkThe RTC can be incremented from any available clock f

Strany 9 - Schedule of Figures

106 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 11: Constraining the CoreINST "*top/rx_rtc_sample_inst/sample_taken

Strany 10 - UG492 July 23, 2010

Ethernet AVB Endpoint User Guide www.xilinx.com 107UG492 July 23, 2010Required ConstraintsINST "*top/avb_configuration_inst/vlan_priority_a_int*&

Strany 11

108 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 11: Constraining the CoreINST "*top/avb_configuration_inst/tx_send_

Strany 12

Ethernet AVB Endpoint User Guide www.xilinx.com 109UG492 July 23, 2010Required ConstraintsINST "*top/rtc_inst/rtc_configuration_inst/reg_nanosec_

Strany 13 - Schedule of Tables

Ethernet AVB Endpoint User Guide www.xilinx.com 11UG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)Appendix A: RTC Time Stamp Accu

Strany 14 - Chapter 13: Software Drivers

110 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 11: Constraining the CoreINST "*top*generic_host_if_inst/host_toggl

Strany 15

Ethernet AVB Endpoint User Guide www.xilinx.com 111UG492 July 23, 2010Chapter 12System IntegrationAs described in Chapter 4, “Generating the Core” and

Strany 16

112 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationLogiCORE IP Tri-Mode Ethernet MAC (Soft Core)Tri-M

Strany 17 - About This Guide

Ethernet AVB Endpoint User Guide www.xilinx.com 113UG492 July 23, 2010Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACsConnections Without Ethernet

Strany 18 - Conventions

114 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationBecause the TEMAC core can often be used in differ

Strany 19 - Online Document

Ethernet AVB Endpoint User Guide www.xilinx.com 115UG492 July 23, 2010Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACsConnections Including Etherne

Strany 20 - List of Abbreviations

116 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationLogiCORE IP Embedded Tri-Mode Ethernet MACsVirtex-

Strany 21

Ethernet AVB Endpoint User Guide www.xilinx.com 117UG492 July 23, 2010Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACsConnections Without Ethernet

Strany 22 - Preface: About This Guide

118 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationBecause the EMAC core can often be used in differe

Strany 23

Ethernet AVB Endpoint User Guide www.xilinx.com 119UG492 July 23, 2010Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACsFigure 12-4 illustrates the c

Strany 24 - Feedback

12 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010

Strany 25 - Document

120 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationX-Ref Target - Figure 12-5Figure 12-5: Connection

Strany 26 - Chapter 1: Introduction

Ethernet AVB Endpoint User Guide www.xilinx.com 121UG492 July 23, 2010Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACsFigure 12-5 can be implemente

Strany 27 - Licensing the Core

122 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationIn this example, the instance of the Ethernet AVB

Strany 28 - Installing the License File

Ethernet AVB Endpoint User Guide www.xilinx.com 123UG492 July 23, 2010Using the Xilinx LogiCORE IP Tri-Mode Ethernet MACsFigure 12-7 shows the impleme

Strany 29 - Bridging

124 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationUsing the Xilinx XPS LocalLink Tri-Mode Ethernet M

Strany 30 - AVB Specifications

Ethernet AVB Endpoint User Guide www.xilinx.com 125UG492 July 23, 2010Using the Xilinx XPS LocalLink Tri-Mode Ethernet MACSystem Overview: AVB capable

Strany 31 - P802.1Qav

126 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationFigure 12-8 illustrates the connection of the core

Strany 32 - Typical Implementation

Ethernet AVB Endpoint User Guide www.xilinx.com 127UG492 July 23, 2010Using the Xilinx XPS LocalLink Tri-Mode Ethernet MACMHS File SyntaxThe following

Strany 33

128 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System IntegrationBEGIN xps_ll_temac PARAMETER INSTANCE = Hard_Ether

Strany 34

Ethernet AVB Endpoint User Guide www.xilinx.com 129UG492 July 23, 2010Using the Xilinx XPS LocalLink Tri-Mode Ethernet MAC PARAMETER C_MEM0_HIGHADDR =

Strany 35

Ethernet AVB Endpoint User Guide www.xilinx.com 13UG492 July 23, 2010Chapter 1: IntroductionChapter 2: Licensing the CoreChapter 3: Overview of Eth

Strany 36 - Core Delivery Format

130 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 12: System Integration

Strany 37 - Ethernet AVB GUI Page 2

Ethernet AVB Endpoint User Guide www.xilinx.com 131UG492 July 23, 2010Chapter 13Software DriversSoftware drivers delivered with the Ethernet AVB Endpo

Strany 38 - Output Generation

132 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 13: Software DriversClock SlaveIf the core is acting as a clock slave, t

Strany 39 - Core Architecture

Ethernet AVB Endpoint User Guide www.xilinx.com 133UG492 July 23, 2010Software System IntegrationFor example, in the user software, the AVB drivers ca

Strany 40

134 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 13: Software DriversCore InitializationWhen Using a LogiCORE IP Tri-Mode

Strany 41 - EDK pcore Format

Ethernet AVB Endpoint User Guide www.xilinx.com 135UG492 July 23, 2010Software System IntegrationYou should also update the following #define if there

Strany 42 - Functional Block Description

136 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 13: Software Drivers* This function is the handler which will be called

Strany 43 - MAC Header Filters

Ethernet AVB Endpoint User Guide www.xilinx.com 137UG492 July 23, 2010Chapter 14Quick Start Example DesignThe quick start steps provided in this chapt

Strany 44 - Rx Time Stamp

138 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 14: Quick Start Example DesignThe Ethernet AVB Endpoint example design h

Strany 45

Ethernet AVB Endpoint User Guide www.xilinx.com 139UG492 July 23, 2010Generating the CoreGenerating the CoreThis section provides detailed instruction

Strany 46 - Tri-Mode Ethernet MACs

14 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Table 10-7: Seconds Field Offset bits [31:0] (PLB_base_address + 0x2808) . . . .

Strany 47 - Core Interfaces

140 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 14: Quick Start Example DesignX-Ref Target - Figure 14-27. Enter a core

Strany 48 - Legacy Traffic Interface

Ethernet AVB Endpoint User Guide www.xilinx.com 141UG492 July 23, 2010Implementing the Example DesignImplementing the Example DesignAfter the core is

Strany 49 - AV Traffic Interface

142 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 14: Quick Start Example DesignTiming SimulationThis section contains ins

Strany 50 - MAC Transmitter Interface

Ethernet AVB Endpoint User Guide www.xilinx.com 143UG492 July 23, 2010Chapter 15Detailed Example Design (Standard Format)This chapter provides detaile

Strany 51 - MAC Management Interface

144 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format) <component_name>/dri

Strany 52

Ethernet AVB Endpoint User Guide www.xilinx.com 145UG492 July 23, 2010Directory and File Contents<project directory>/<component name>The &

Strany 53 - PLB Interface

146 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)<component name>/impl

Strany 54 - Chapter 5: Core Architecture

Ethernet AVB Endpoint User Guide www.xilinx.com 147UG492 July 23, 2010Directory and File Contentsimplement/resultsThe results directory is created by

Strany 55 - Interrupt Signals

148 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)simulation/timingThe timing

Strany 56 - PTP Signals

Ethernet AVB Endpoint User Guide www.xilinx.com 149UG492 July 23, 2010Directory and File Contents<component_name>/drivers/v2_04_aA directory con

Strany 57 - Chapter 6

Ethernet AVB Endpoint User Guide www.xilinx.com 15UG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)Table 16-1: Project Directory.

Strany 58

150 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)drivers/avb_v2_04_a/srcThe

Strany 59 - Tx AV Traffic I/F

Ethernet AVB Endpoint User Guide www.xilinx.com 151UG492 July 23, 2010Implementation ScriptsImplementation ScriptsThe implementation script is either

Strany 60

152 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)Timing SimulationThe test s

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Ethernet AVB Endpoint User Guide www.xilinx.com 153UG492 July 23, 2010Example DesignTop-Level Example Design HDLThe following files describe the top-l

Strany 62

154 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)The data field of the frame

Strany 63 - Tx Arbiter Bandwidth Control

Ethernet AVB Endpoint User Guide www.xilinx.com 155UG492 July 23, 2010Example DesignPLB ModuleThe following files describe the logic for the PLB modul

Strany 64

156 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)Demonstration Test BenchFig

Strany 65 - Chapter 7

Ethernet AVB Endpoint User Guide www.xilinx.com 157UG492 July 23, 2010Example DesignCustomizing the Test BenchSimulation Run TimeThe default simulatio

Strany 66

158 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 15: Detailed Example Design (Standard Format)Viewing the Simulation Wave

Strany 67 - Legacy MAC Header Filters

Ethernet AVB Endpoint User Guide www.xilinx.com 159UG492 July 23, 2010Chapter 16Detailed Example Design (EDK format)This chapter provides detailed inf

Strany 68

16 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010

Strany 69

160 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)Directory and File ContentsThe c

Strany 70 - Match Enable Register

Ethernet AVB Endpoint User Guide www.xilinx.com 161UG492 July 23, 2010Directory and File Contents<component name>/docThe doc directory contains

Strany 71

162 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)pcores/eth_avb_endpoint_v2_04_a/

Strany 72 - Any Other Combinations

Ethernet AVB Endpoint User Guide www.xilinx.com 163UG492 July 23, 2010Directory and File Contentsdrivers/avb_v2_04_a/dataThe driver data directory con

Strany 73 - Rx AV Traffic I/F

164 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)drivers/avb_v2_04_a/srcThe drive

Strany 74 - Errored AV Traffic Reception

Ethernet AVB Endpoint User Guide www.xilinx.com 165UG492 July 23, 2010Importing the Ethernet AVB Endpoint Core into the Embedded Development Kit (EDK)

Strany 75 - Chapter 8

166 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)

Strany 76

Ethernet AVB Endpoint User Guide www.xilinx.com 167UG492 July 23, 2010Appendix ARTC Time Stamp AccuracyTime Stamp AccuracyThe accuracy of the time sta

Strany 77 - RTC Implementation

168 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Appendix A: RTC Time Stamp AccuracyThe maximum RTC inaccuracy, per time stamp sa

Strany 78 - (Step 2) Synchronized RTC

Ethernet AVB Endpoint User Guide www.xilinx.com 169UG492 July 23, 2010Time Stamp AccuracyRTC Sampling ErrorIt has to be assumed that the RTC reference

Strany 79 - Time Stamping Logic

Ethernet AVB Endpoint User Guide www.xilinx.com 17UG492 July 23, 2010PrefaceAbout This GuideThe LogiCORE™ IP Ethernet AVB User Guide provides informat

Strany 80

170 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Appendix A: RTC Time Stamp AccuracyX-Ref Target - Figure A-3Figure A-3: Sampling

Strany 81

Ethernet AVB Endpoint User Guide www.xilinx.com 171UG492 July 23, 2010Time Stamp AccuracyAccuracy Resulting from the Combined ErrorsThe section “RTC R

Strany 82

172 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Appendix A: RTC Time Stamp Accuracy♦ If the flip-flop samples the new value, the

Strany 83 - Chapter 9

18 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Preface: About This Guide• Chapter 13, “Software Drivers” describes the function

Strany 84

Ethernet AVB Endpoint User Guide www.xilinx.com 19UG492 July 23, 2010ConventionsOnline DocumentThe following conventions are used in this document:Bra

Strany 85 - Rx PTP Packet Buffer

Ethernet AVB Endpoint User Guide www.xilinx.com UG492 July 23, 2010Xilinx is providing this product documentation, hereinafter “Information,” to you “

Strany 86

20 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Preface: About This GuideList of AbbreviationsThe following table describes acron

Strany 87 - Configuration and Status

Ethernet AVB Endpoint User Guide www.xilinx.com 21UG492 July 23, 2010ConventionsPHY physical-side interfacePHYAD Physical AddressPLB Processor Local B

Strany 88

22 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Preface: About This Guide

Strany 89 - Single Write Transaction

Ethernet AVB Endpoint User Guide www.xilinx.com 23UG492 July 23, 2010Chapter 1IntroductionThis chapter introduces the core and provides related inform

Strany 90

24 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 1: IntroductionRecommended Design ExperienceAlthough the Ethernet AVB End

Strany 91

Ethernet AVB Endpoint User Guide www.xilinx.com 25UG492 July 23, 2010FeedbackDocumentFor comments or suggestions about this document, submit a WebCase

Strany 92

26 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 1: Introduction

Strany 93 - Rx Filtering Control Register

Ethernet AVB Endpoint User Guide www.xilinx.com 27UG492 July 23, 2010Chapter 2Licensing the CoreThis chapter provides instructions for obtaining a lic

Strany 94 - TC nanoseconds field. Used

28 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 2: Licensing the CoreFull The Full license key is available when you purc

Strany 95 - Current RTC Value Registers

Ethernet AVB Endpoint User Guide www.xilinx.com 29UG492 July 23, 2010Chapter 3Overview of Ethernet Audio Video BridgingFigure 3-1 illustrates a potent

Strany 96 - RTC Interrupt Clear Register

Ethernet AVB Endpoint User Guide www.xilinx.com 3UG492 July 23, 2010Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Strany 97 - Phase Adjustment Register

30 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 3: Overview of Ethernet Audio Video BridgingTo understand the requirement

Strany 98

Ethernet AVB Endpoint User Guide www.xilinx.com 31UG492 July 23, 2010AVB SpecificationsP802.1QavThis specification defines the mechanism for queuing a

Strany 99

32 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 3: Overview of Ethernet Audio Video BridgingP802.1QatThis specification d

Strany 100 - MAC Address Filter Registers

Ethernet AVB Endpoint User Guide www.xilinx.com 33UG492 July 23, 2010Typical ImplementationFigure 3-2 illustrates that the Ethernet AVB Endpoint core

Strany 101 - MAC MDIO Registers

34 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 3: Overview of Ethernet Audio Video Bridging

Strany 102

Ethernet AVB Endpoint User Guide www.xilinx.com 35UG492 July 23, 2010Chapter 4Generating the CoreThe Ethernet AVB Endpoint core is fully configurable

Strany 103 - Constraining the Core

36 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 4: Generating the CoreComponent NameThe component name is used as the bas

Strany 104 - signal:

Ethernet AVB Endpoint User Guide www.xilinx.com 37UG492 July 23, 2010Ethernet AVB GUI Page 2Ethernet AVB GUI Page 2Figure 4-2 shows page 2 of the Ethe

Strany 105

38 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 4: Generating the CoreParameter Values in the XCO FileXCO file parameter

Strany 106

Ethernet AVB Endpoint User Guide www.xilinx.com 39UG492 July 23, 2010Chapter 5Core ArchitectureAs described in Chapter 4, “Generating the Core”, the c

Strany 107 - Required Constraints

4 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 4: Generating the CoreEthernet AVB GUI Page 1 . . . . . . . . . . . . . .

Strany 108

40 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitectureStandard CORE Generator FormatFigure 5-1 illustrates

Strany 109 - "rtc_regs_sample";

Ethernet AVB Endpoint User Guide www.xilinx.com 41UG492 July 23, 2010EDK pcore FormatEDK pcore FormatFigure 5-2 illustrates the functional blocks of t

Strany 110

42 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitectureFunctional Block DescriptionThe following functional

Strany 111 - System Integration

Ethernet AVB Endpoint User Guide www.xilinx.com 43UG492 July 23, 2010Functional Block DescriptionTx ArbiterData for transmission over an AVB network c

Strany 112

44 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitecturePrecise Timing Protocol BlocksThe various hardware Pr

Strany 113

Ethernet AVB Endpoint User Guide www.xilinx.com 45UG492 July 23, 2010Functional Block DescriptionRTCA significant component of the PTP network wide ti

Strany 114

46 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitectureSoftware DriversSoftware Drivers are delivered with t

Strany 115

Ethernet AVB Endpoint User Guide www.xilinx.com 47UG492 July 23, 2010Core InterfacesCore InterfacesAll ports of the core are internal connections in F

Strany 116

48 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitectureLegacy Traffic InterfaceLegacy Traffic Transmitter Pa

Strany 117

Ethernet AVB Endpoint User Guide www.xilinx.com 49UG492 July 23, 2010Core InterfacesAV Traffic InterfaceAV Traffic Transmitter Path SignalsTable 5-4 d

Strany 118

Ethernet AVB Endpoint User Guide www.xilinx.com 5UG492 July 23, 2010Chapter 8: Real Time Clock and Time StampingReal Time Clock . . . . . . . . . .

Strany 119

50 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitectureAV Traffic Receiver Path SignalsTable 5-5 defines the

Strany 120

Ethernet AVB Endpoint User Guide www.xilinx.com 51UG492 July 23, 2010Core InterfacesMAC Receiver InterfaceThese signals connect directly to the identi

Strany 121

52 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitectureProcessor Local Bus (PLB) InterfaceThe Processor Loca

Strany 122

Ethernet AVB Endpoint User Guide www.xilinx.com 53UG492 July 23, 2010Core InterfacesPLB InterfaceTable 5-9 defines the signals on the PLB bus. For det

Strany 123

54 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitecturePLB_wrPendPri[0:1] Input Unused. PLB pending read bus

Strany 124 - Introduction

Ethernet AVB Endpoint User Guide www.xilinx.com 55UG492 July 23, 2010Core InterfacesInterrupt SignalsTable 5-10 defines the interrupt signals asserted

Strany 125 - Ethernet

56 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 5: Core ArchitecturePTP SignalsTable 5-11 defines the signals which are o

Strany 126

Ethernet AVB Endpoint User Guide www.xilinx.com 57UG492 July 23, 2010Chapter 6Ethernet AVB Endpoint TransmissionAs illustrated in Figure 5-1, data for

Strany 127 - MHS File Syntax

58 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 6: Ethernet AVB Endpoint TransmissionError Free Legacy Frame Transmission

Strany 128

Ethernet AVB Endpoint User Guide www.xilinx.com 59UG492 July 23, 2010Tx AV Traffic I/FErrored Legacy Frame TransmissionThe legacy_tx_underrun is provi

Strany 129

6 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 14: Quick Start Example DesignOverview . . . . . . . . . . . . . . . . .

Strany 130

60 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 6: Ethernet AVB Endpoint TransmissionFigure 6-3 illustrates the timing of

Strany 131 - Software Drivers

Ethernet AVB Endpoint User Guide www.xilinx.com 61UG492 July 23, 2010Tx ArbiterTx ArbiterOverviewAs illustrated in Figure 5-1, data for transmission o

Strany 132 - Software System Integration

62 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 6: Ethernet AVB Endpoint TransmissionFigure 6-4 illustrates the key featu

Strany 133

Ethernet AVB Endpoint User Guide www.xilinx.com 63UG492 July 23, 2010Tx Arbiter• During AV traffic transmission, credit is removed at a rate defined b

Strany 134 - Ethernet AVB Endpoint Setup

64 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 6: Ethernet AVB Endpoint TransmissionhiLimitThe general equation is:hiLim

Strany 135

Ethernet AVB Endpoint User Guide www.xilinx.com 65UG492 July 23, 2010Chapter 7Ethernet AVB Endpoint ReceptionRx SplitterThe input to the Rx splitter (

Strany 136

66 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 7: Ethernet AVB Endpoint ReceptionError Free Legacy Frame ReceptionFigure

Strany 137 - Quick Start Example Design

Ethernet AVB Endpoint User Guide www.xilinx.com 67UG492 July 23, 2010Rx Legacy Traffic I/FErrored Legacy Frame ReceptionAs illustrated in Figure 7-2,

Strany 138

68 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 7: Ethernet AVB Endpoint ReceptionFigure 7-3 illustrates Legacy frame rec

Strany 139 - Generating the Core

Ethernet AVB Endpoint User Guide www.xilinx.com 69UG492 July 23, 2010Rx Legacy Traffic I/FMAC Header Filter ConfigurationThe MAC Header Filters can be

Strany 140

Ethernet AVB Endpoint User Guide www.xilinx.com 7UG492 July 23, 2010Chapter 16: Detailed Example Design (EDK format)Directory and File Contents . .

Strany 141 - Simulating the Example Design

70 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 7: Ethernet AVB Endpoint ReceptionSingle MAC Header Filter Usage Examples

Strany 142 - What’s Next?

Ethernet AVB Endpoint User Guide www.xilinx.com 71UG492 July 23, 2010Rx Legacy Traffic I/FPartial Destination Address (DA) MatchThe example illustrate

Strany 143 - Chapter 15

72 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 7: Ethernet AVB Endpoint ReceptionVLAN Priority MatchThe example illustra

Strany 144 - Directory and File Contents

Ethernet AVB Endpoint User Guide www.xilinx.com 73UG492 July 23, 2010Rx AV Traffic I/FRx AV Traffic I/FThe signals forming the Rx AV Traffic I/F are d

Strany 145 - <component name>/doc

74 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 7: Ethernet AVB Endpoint ReceptionErrored AV Traffic ReceptionAs illustra

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Ethernet AVB Endpoint User Guide www.xilinx.com 75UG492 July 23, 2010Chapter 8Real Time Clock and Time StampingThis chapter considers two of the logic

Strany 147

76 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 8: Real Time Clock and Time StampingConceptually, the RTC is not related

Strany 148 - Table 15-9: Timing Directory

Ethernet AVB Endpoint User Guide www.xilinx.com 77UG492 July 23, 2010Real Time ClockRTC ImplementationIncrement of Nanoseconds FieldFigure 8-2 illustr

Strany 149

78 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 8: Real Time Clock and Time StampingThere are two stages to the implement

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Ethernet AVB Endpoint User Guide www.xilinx.com 79UG492 July 23, 2010Time Stamping LogicClock Outputs Based on the Synchronized RTC Nanoseconds FieldT

Strany 151 - Simulation Scripts

8 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010

Strany 152 - Example Design

80 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 8: Real Time Clock and Time StampingTime Stamp Sampling Position of MAC F

Strany 153 - Ethernet Frame Stimulus

Ethernet AVB Endpoint User Guide www.xilinx.com 81UG492 July 23, 2010IEEE1722 Real Time Clock FormatBecause the Xilinx Tri-Mode Ethernet MACs have a k

Strany 154 - Loopback Module

82 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 8: Real Time Clock and Time Stamping

Strany 155 - PLB Module

Ethernet AVB Endpoint User Guide www.xilinx.com 83UG492 July 23, 2010Chapter 9Precise Timing Protocol Packet BuffersThis chapter considers two of the

Strany 156 - Demonstration Test Bench

84 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 9: Precise Timing Protocol Packet BuffersDespite the logic and formatting

Strany 157 - Customizing the Test Bench

Ethernet AVB Endpoint User Guide www.xilinx.com 85UG492 July 23, 2010Rx PTP Packet BufferRx PTP Packet BufferThe Rx PTP packet buffer is illustrated i

Strany 158 - X-Ref Target - Figure 15-3C

86 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 9: Precise Timing Protocol Packet BuffersThe “Software Drivers” provided

Strany 159

Ethernet AVB Endpoint User Guide www.xilinx.com 87UG492 July 23, 2010Chapter 10Configuration and StatusThis chapter provides general guidelines for co

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88 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusX-Ref Target - Figure 10-1Figure 10-1: Single

Strany 161

Ethernet AVB Endpoint User Guide www.xilinx.com 89UG492 July 23, 2010Processor Local Bus InterfaceSingle Write TransactionFigure 10-2 illustrates a si

Strany 162

Ethernet AVB Endpoint User Guide www.xilinx.com 9UG492 July 23, 2010Chapter 1: IntroductionChapter 2: Licensing the CoreChapter 3: Overview of Ethe

Strany 163

90 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusPLB Address Map and Register DefinitionsFigur

Strany 164

Ethernet AVB Endpoint User Guide www.xilinx.com 91UG492 July 23, 2010PLB Address Map and Register DefinitionsThe entire address space is now described

Strany 165 - Development Kit (EDK)

92 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusEthernet AVB Endpoint Address SpaceRx PTP Pac

Strany 166

Ethernet AVB Endpoint User Guide www.xilinx.com 93UG492 July 23, 2010PLB Address Map and Register DefinitionsRx PTP Packet Control RegisterTable 10-2

Strany 167 - RTC Time Stamp Accuracy

94 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusTx Arbiter Send Slope Control RegisterThe sen

Strany 168 - 0 40 80 120 160 200 240RTC

Ethernet AVB Endpoint User Guide www.xilinx.com 95UG492 July 23, 2010PLB Address Map and Register DefinitionsThis register and the registers defined i

Strany 169 - RTC Sampling Error

96 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusThis register and the registers defined in Ta

Strany 170 - Sampling

Ethernet AVB Endpoint User Guide www.xilinx.com 97UG492 July 23, 2010PLB Address Map and Register DefinitionsPhase Adjustment RegisterTable 10-14 desc

Strany 171

98 www.xilinx.com Ethernet AVB Endpoint User GuideUG492 July 23, 2010Chapter 10: Configuration and StatusMAC Header Filter ConfigurationWhen the core

Strany 172

Ethernet AVB Endpoint User Guide www.xilinx.com 99UG492 July 23, 2010PLB Address Map and Register DefinitionsPLB_base_address+ 0x3000+ (filter# * 0x20

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